In the process of Printed circuit board reverse engineering, Although the EDA tool has become much strong than before in the field of printed circuit board reverse engineering, according with the decreasing size of printed circuit board, as well as the more density of electronic components, the difficulty of printed circuit board reverse engineering is higher than before also. In order to solve the difficulty engineer will encounter, and speed up the product launching time frame, now, more and more engineer intend to use dedicated EDA tools to proceed the printed circuit board reverse engineering. However, the dedicated EDA tools won’t be able to generate the ideal conditions and it is also difficult to achieve the 100% yield rate plus the mess up of circuit tracks layout which normally will require more time to complete the abundant work.
Confirm the printed circuit board layer count before reverse engineering, the dimension and layer count of printed circuit board must be fixed in the preliminary stage, if the ball grid array has been applied in the printed circuit board reverse engineering, then it is necessary to consider the minimum layer count will be required for the component layout and arrangement. The quantity of layer count and stack up method will affect the printed circuit board reverse engineering and impedance directly. And the dimension of printed circuit board can help to determine the stack up way and track width to achieve the expected result.